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FCLF-8520/8521-3 1000BASE-T SFP Product Specification
F i n i s a r
I.
SFP to Host Connector Pin Out
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Symbol
V EET
T FAULT
T DIS
MOD_DEF(2)
MOD_DEF(1)
MOD_DEF(0)
Rate Select
LOS
V EER
V EER
V EER
RD-
RD+
V EER
V CCR
V CCT
V EET
TD+
TD-
V EET
Name/Description
Transmitter ground (common with receiver ground)
Transmitter Fault. Not supported
Transmitter Disable. PHY disabled on high or open
Module Definition 2. Data line for serial ID
Module Definition 1. Clock line for serial ID
Module Definition 0. Grounded within the module
No connection required
Loss of Signal indication.
Receiver ground (common with transmitter ground)
Receiver ground (common with transmitter ground)
Receiver ground (common with transmitter ground)
Receiver Inverted DATA out. AC coupled
Receiver Non-inverted DATA out. AC coupled
Receiver ground (common with transmitter ground)
Receiver power supply
Transmitter power supply
Transmitter ground (common with receiver ground)
Transmitter Non-Inverted DATA in. AC coupled
Transmitter Inverted DATA in. AC coupled
Transmitter ground (common with receiver ground)
Note
1
2
3
3
3
4
1
1
1
1
1
1
Notes: 1. Circuit ground is connected to chassis ground
2. PHY disabled on T DIS > 2.0V or open, enabled on T DIS < 0.8V
3. Should be pulled up with 4.7k – 10k Ohms on host board to a voltage between 2.0 V and 3.6 V.
MOD_DEF(0) pulls line low to indicate module is plugged in.
4. LVTTL compatible with a maximum voltage of 2.5V. Not supported on FCLF-8521-3.
Table 1. SFP to host connector pin assignments and descriptions
VeeT
20
1
VeeT
TD-
19
2
TXFault
TD+
18
3
TX Disable
VeeT
17
4
MOD-DEF(2)
VccT
16
Towards
Bezel
5
6
MOD-DEF(1)
MOD-DEF(0)
VccR
VeeR
15
14
Towards
ASIC
7
Rate Select
RD+
13
8
LOS
RD-
12
9
VeeR
VeeR
11
10
VeeR
Figure 1. Diagram of host board connector block pin numbers and names
? Finisar Corporation December 16, 2005 RevB
Page 2
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